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nukeykt

@nukeykt

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Author of Nuked emulators(OPL3, OPN2, SC-55), NBlood/Rednukem and whatnot. Interested in reverse engineering (old games & integrated circuits) and emulation

Joined October 2013
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@nukeykt
nukeykt
7 months
PCM chip emulation is complete now (chorus/reverb/filter) #sc55
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@nukeykt
nukeykt
1 year
Released initial version of Nuked-MD-FPGA, cycle-accurate mega drive/genesis core based on reverse-engineering photos decapped MD chipset
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@nukeykt
nukeykt
9 months
dumped SC-55mkII's secondary MCU (Mitsubishi m37409m2) firmware using voltage glitching. Injecting trojan to its ram and using glitch to corrupt PC counter to execute it did the trick
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@nukeykt
nukeykt
1 year
My cycle-accurate mega drive emulator now able to boot simple ROMs (TMSS ROM in this screenshot)
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@nukeykt
nukeykt
2 years
Mega Drive VDP (YM7101) progress. Only half of sprite block, video mux, VRAM ctrl and PSG are left
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@nukeykt
nukeykt
2 years
Working on YM7101 VDP core for cycle accurate Mega Drive emulator
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@nukeykt
nukeykt
8 months
Roland SC-55 pcm chip tracing WIP
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@nukeykt
nukeykt
5 months
shaping up nicely
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@nukeykt
nukeykt
5 months
toying with dear imgui to add proper gui for Nuked SC-55
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@nukeykt
nukeykt
6 years
NBlood released. NBlood is a open source and accurate port of Blood based on EDuke32(by @voidpnt ). Download: Thread:
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@nukeykt
nukeykt
1 year
my cycle accurate mega drive emulator now boots some games, it's quite slow though: 0.1fps
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@nukeykt
nukeykt
5 months
Tracing gravis ultrasound PCM chip
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@nukeykt
nukeykt
11 months
OPL3 & OPL2
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@nukeykt
nukeykt
11 months
fpga OPL3 over TPM header of motherboard. DOS games see it as real adlib sound card
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@nukeykt
nukeykt
7 months
fixed envelopes, sounds much better now #sc55
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@nukeykt
nukeykt
8 months
coming along nicely
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@nukeykt
nukeykt
7 months
very rudimentary PCM chip emulation
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@nukeykt
nukeykt
1 year
my Z80 verilog core passed zexall test
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@nukeykt
nukeykt
2 years
My gate-level 68000 core now boots some sega games
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@nukeykt
nukeykt
11 months
Hardware sound blaster emulation on 2014 mobo using TPM header, fpga devboard and minor soldering
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@nukeykt
nukeykt
2 years
current progress with 68000 core
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@nukeykt
nukeykt
1 year
ironed out majority of bugs in my verilog mega drive emulation
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@nukeykt
nukeykt
1 year
Ported Nuked-MD's 68000 emulation to verilog and tested on real Mega Drive board. Still has some bugs that yet to be fixed
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@nukeykt
nukeykt
2 years
Mega Drive 2 bus arbiter (part of big Yamaha FC1004 ASIC)
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@nukeykt
nukeykt
1 year
Verilog port of Nuked-MD is mostly functional now
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@nukeykt
nukeykt
2 years
68000 progress
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@nukeykt
nukeykt
1 year
mega drive ym7101 vdp verilog wip
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@nukeykt
nukeykt
1 year
Mega Drive 2 IO chip (part of big Yamaha FC1004 chip)
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@nukeykt
nukeykt
2 years
Mega Drive VDP (YM7101) emulation progress
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@nukeykt
nukeykt
1 year
lol
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@nukeykt
nukeykt
9 months
Special thanks for @RCAVictorCo , @johndmcmaster and HardWareMan for decapping YM2608B, YM2610 and YM2612 respectively
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@nukeykt
nukeykt
2 years
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@nukeykt
nukeykt
2 years
Working on Z80 core for my cycle accurate mega drive emulator
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@nukeykt
nukeykt
2 years
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@nukeykt
nukeykt
2 years
Working on 68000 core for Nuked MD
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@nukeykt
nukeykt
8 months
@RCAVictorCo Yup, that's correct. A few MD games incorrectly read busy flag from illegal ports and thus reading whatever was on read bus. On YM2612 that value would decay relatively quickly and thus not super critical, but on YM3438 value will stay for 10-30 seconds, causing major freezes
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@nukeykt
nukeykt
8 months
@johndmcmaster interesting, looks like made by Toshiba rather than their own semiconductor division, wonder why
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@nukeykt
nukeykt
1 year
@furrtek org/ogamespec recently decapped sega 315-5339 chip used in mega drive 1 va1, which turned out to be UPD65005 gate array as well ๐Ÿ˜†
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@nukeykt
nukeykt
7 months
@giuliozausa It's some kind of DPCM, each byte is signed 8 bit step value plus every 16 bytes share same 4 bit step shift value stored in the beginning of ROM
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@nukeykt
nukeykt
4 years
@madscient OPL3 does not use sine table for sawtooth wave, it sends bit shifted phase value to logtable
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@nukeykt
nukeykt
1 year
@furrtek interesting, looks like they used same CMOS cell library as in Mega Drive bus arbiter (YM6045B/C) and IO chip (YM6046). We studied its cells a bit here
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@nukeykt
nukeykt
9 months
@giuliozausa If you can write data to its RAM then yeah, it is quite possible. Or if part of code is in external ROM (like with SC-55mkII's main MCU) it is possible to inject trojan in ROM chip instead
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@nukeykt
nukeykt
8 months
@RCAVictorCo Teradrive was first MD system to use YM3438, and at the very end of its development sega noticed this issue and literally patched PCBs to fix by cutting traces to A0/A1 and adding AND gates between them and RD signal. Later they asked Yamaha to make this change in FC1004 asic
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@nukeykt
nukeykt
8 months
@kurohouou @_daemons software emulation
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@nukeykt
nukeykt
7 months
@giuliozausa yup, once I figure it out from die analysis
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@nukeykt
nukeykt
1 year
@RCAVictorCo yes, sound chips and mega drive vdp (huge cmos chip) look like hand made. MD bus arbiter/IO chips (both standalone (2 layers m) and integrated (1 layer m)) are auto-traced and look like mess and quite inefficient. example:
@nukeykt
nukeykt
2 years
Mega Drive 2 bus arbiter (part of big Yamaha FC1004 ASIC)
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@nukeykt
nukeykt
5 years
@illusorywall @RetroGameAudio @a_p_0_c @kr_burke @plgDavid @Lizzard VRC7 research was part of my OPLL emulation project, which i more or less finished recently and released cycle accurate emulation core called Nuked OPLL
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@nukeykt
nukeykt
8 months
@RCAVictorCo Here's how FC1004's YM3438 was patched
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@nukeykt
nukeykt
2 years
@RCAVictorCo Counter bit for timers, andor is used to load counter value from registers. Literally this thing from NMOS chips lol
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@nukeykt
nukeykt
1 year
@leo__oliveira @plutiedev @birt_shannon I have schematic from its integration into FC1004 asic. It uses BGACK/WAIT to detect DMA start and add extra refresh pulse and switches OE0 to CAS0. Have no idea what does latter, OE0 and CAS0 are same during DMA. Maybe something at the end of dma, dunno
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@nukeykt
nukeykt
8 months
@1Cy001 it fills ram with nop and writes dumper code. dumper flags specific byte to tell that hack worked and just copies 128 bytes from specified address to dual port ram, which I then read back
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@nukeykt
nukeykt
5 months
@leo__oliveira @RCAVictorCo @v9938 @goripon_tw also it adds some bullshit circuit to make bus arbiter broken in PAL mode lol (TPAL pin). It was never used in consoles with discrete YM6045C (always tied to 5v) afaik, but was later used in integrated bus arbiter in FC1004 to prevent VA7 consoles selling in PAL regions lol
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@nukeykt
nukeykt
9 months
@travisgoodspeed Thanks I used the latter approach, this MCU uses modified 6502 as its core and only have 8kb of address space, thus chances hitting needed RAM space was pretty high
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@nukeykt
nukeykt
5 months
@v9938 @leo__oliveira @RCAVictorCo @goripon_tw MD's bus arbiter size actually was dictated by pin count heh. Also I never seen yamaha gate arrays, their chips always were full custom
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@nukeykt
nukeykt
2 years
my Z80 core passed all but one tests in ZEXALL
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@nukeykt
nukeykt
6 years
@plgDavid @MrMadbrain Hey. I've also dumped rhythm patches from VRC7, and i suspect these patches match 2413's set. Can you confirm this?
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@nukeykt
nukeykt
5 months
@leo__oliveira @v9938 @RCAVictorCo @goripon_tw Hmm, isn't gate array a tech where only metal layer is custom to interconnect underlying polysilicon/diffussion array to form logic elements?
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@nukeykt
nukeykt
9 months
@Dave_Maynor Disabling power of the chip will cause PC register corrupt to randomish value. Since this is really simple 8 bit MCU with very small memory footprint (only 8kb), there's very high chances to point PC to ram address and execute it after lots of retries
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@nukeykt
nukeykt
1 year
@travisgoodspeed @RCAVictorCo Is there high res version of die photos? Would love to finally implement YM2413 mode correctly in my VRC7 schematics and software emulator. I had to approximate some bits that were removed in VRC7. Thanks
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@nukeykt
nukeykt
2 years
YM3438 netlist WIP. Top half and 1/3 of bottom are done
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@nukeykt
nukeykt
8 months
@leo__oliveira yea, toshiba 24201F002
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@nukeykt
nukeykt
2 years
@RCAVictorCo You probably can check decaps of other Yamaha chips of the same era(e.g YMF262 or Mega Drive YM7101 VDP). Also this might be useful
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@nukeykt
nukeykt
2 years
@furrtek @RCAVictorCo Looks kinda similar to YM3812(OPL2), too few pads for YM2612 (uses all 24 pins)
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@nukeykt
nukeykt
6 months
@RCAVictorCo duty cycle of output is only 25%. So 75% of times it outputs the "fixed" value biased toward sign value. Also if you mute channel, it will output fixed value all the time, but you'll still hear some sound coming out of it (e.g. EWJ2 moonlight sonata)
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@nukeykt
nukeykt
6 months
@RCAVictorCo here it is, on YM2610 it is much smaller because encoder code was removed
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@nukeykt
nukeykt
2 years
@icculus Heh, doom uses similar trick to pack texture coordinates into one variable. Build engine was doing something similar in its asm routines, but it was packing 4 variables in 3 cpu registers IIRC
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@nukeykt
nukeykt
5 months
@leo__oliveira @RCAVictorCo @v9938 @goripon_tw yea, it integrates 315-5345(EDCLK + PSRAM fix), also it adds couple TMSS related decoders
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@nukeykt
nukeykt
8 months
@leo__oliveira it's TC24SC201AF-002 in service manual, 24201F002 seems is shorter variant of that
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@nukeykt
nukeykt
6 months
@RCAVictorCo well, "fixed". Because matrix resistance is not infinite it will cause some offset. This error then gets accummulated and cause infamous "ladder effect"
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@nukeykt
nukeykt
5 months
@giuliozausa using native renderer commands, currently only have opengl and sdl2 renderer
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@nukeykt
nukeykt
5 years
@Grauw @ym2413 Interesting, looks like it using test bits 2 and 0. Bit 2 resets phase accumulator on each iteration and thus phase gen. unit effectively outputs phase increment value which could be controlled using r #16 . Bit 0 forces env. gen to output zero attenuation value (e.g max volume)
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@nukeykt
nukeykt
1 year
@RCAVictorCo @travisgoodspeed doing from scratch is more fun :D, my current workflow is label cell in inkscape and directly write C code. we can then double check our results though I don't have source images
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@nukeykt
nukeykt
2 years
Added preliminary YM2612 mode
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@nukeykt
nukeykt
2 years
@leo__oliveira @kumokosi Both are CMOS actually, FC1001 is just die shrink
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@nukeykt
nukeykt
8 months
@TheOpenRift seems it uses completely different approach than my effort. i.e. it tries to interpret instrument defiinitions from rom chips, but otherwise it is completely custom code (similar to Munt). My approach is similar to MAME, i.e. emulate CPUs and PCM chip and run SC-55 firmware as is
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@nukeykt
nukeykt
1 year
@furrtek @turboxray @Stanislav_Prh calculations I used for nuked-md. I've measured resistance between GND and VCC pins of VDP and then calculated overall resistance to GND and VCC for each level. Results is pretty close to what others measured using scope
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@nukeykt
nukeykt
1 year
@RCAVictorCo looks like you missed ENVCNT.D1 inversion
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@nukeykt
nukeykt
9 months
@1Cy001 part of internal ram is dual port and can be accessed by external device. I put custom code there. I used this ram for dumping as well, copying firmware piece by piece (this type of ram is 192 bytes only, firmware itself is 4096 bytes)
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@nukeykt
nukeykt
1 year
@furrtek @turboxray @Stanislav_Prh non-linearity is caused by the external voltage divider
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@nukeykt
nukeykt
1 year
@RocketFry Yup, it works like a charm with a few games I tried
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@nukeykt
nukeykt
7 months
@richard_eng windows app that will listen to midi in stream and produce sound
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@nukeykt
nukeykt
2 years
@RCAVictorCo here's schematic I did for this cell
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@nukeykt
nukeykt
6 years
@mikepavone @DustinOfcYT FYI. This was 'fixed' only in ASIC YM3438 variant. Like YM2612 both discrete YM3438 and later YMF276 output correct status only when A0 and A1 pin states are zero. Thus these games have issues with YM3438 modded MD1.
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@nukeykt
nukeykt
8 months
@RCAVictorCo Earthworm Jim and Sonic Spinball probably are prime examples exhibiting this issue
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