Irreducible @IrreducibleHW Twitter profile

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Irreducible

@IrreducibleHW

3 months

Ulvetanna becomes Irreducible And that's not all... 👇

Becoming Irreducible - Irreducible

Ulvetanna is rebranding to Irreducible

www.irreducible.com

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Irreducible

@IrreducibleHW

2 years

Announcing our $15M Seed Round co-led by @BainCapCrypto & @paradigm with participation from @jump_ , @CrusoeEnergy & @robotventures

Introducing Irreducible, Cost-Efficient Zero Knowledge Proofs - Irreducible

Announcing our $15M Seed Round co-led by Bain Capital Crypto and Paradigm with participation from Jump Crypto

www.irreducible.com

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Irreducible

@IrreducibleHW

4 months

Concerned about Binius proof sizes? Our latest research paper shows we can use FRI to reduce proof size, while still working for all binary tower fields.

FRI-Binius: Improved Polynomial Commitments for Binary Towers - Irreducible

In a new research paper, we adapt BaseFold's multivariate FRI commitments to binary towers, reducing Binius proof sizes.

www.irreducible.com

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Irreducible

@IrreducibleHW

6 months

Tune in next week for our latest binary tower field performance metrics. We're excited to discuss with other experts in the ZK & verifiable computing field!

StarkWare 🐺🐱

@StarkWareLtd

6 months

STARK @ Home is back with special guests! Join us for a heated discussion of KZG, FRI, and Binius on our next STARK @ Home with: ✅ @EliBenSasson , @PapiniShahar from StarkWare ✅ @jimpo_potamus from @UlvetannaHQ ✅ @Zac_Aztec from @aztecnetwork ✅ @m_ratsim from @taikoxyz 📅Feb

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Irreducible

@IrreducibleHW

8 months

There's a new SNARK on the block. SNARKs based on towers of binary fields are the future of prover-efficient verifiable computing. Read here about Ulvetanna's research effort and our newly published Rust implementation, Binius.

Binius: a Hardware-Optimized SNARK - Irreducible

We demonstrate a performance-optimized approach to SNARK construction based on towers of binary fields.

www.irreducible.com

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Irreducible

@IrreducibleHW

6 months

In a new report, we summarize our research on a novel alternative to GPUs and FPGAs for ZKP acceleration: AMD Versal. We demo high-throughput elliptic curve computations and present our system architecture, results, and learnings from this work.

Elliptic Curve ZK-Proof Acceleration on AMD Versal - Irreducible

We present a novel system demo accelerating elliptic curve cryptography on AMD's Versal heterogeneous compute platform.

www.irreducible.com

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Irreducible

@IrreducibleHW

1 year

The first Poseidon hash Merkle tree hardware implementation:

Poseidon Merkle Trees in Hardware - Irreducible

We report the first fully-pipelined FPGA architecture for ZKP-friendly Merkle trees using the Poseidon hash

www.irreducible.com

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Irreducible

@IrreducibleHW

3 months

We're excited to present Vision Mark-32, a hash function designed for use with Binius. FPGA implementation shows that Vision Mark-32 achieves the ZK-friendliness of Poseidon with 10x better HW performance.

Vision Mark-32: A ZK-Friendly Hash Function Over Binary Tower Fields - Irreducible

In collaboration with 3MI Labs, we introduce a arithmetization-oriented hash function designed for Binius.

www.irreducible.com

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Irreducible

@IrreducibleHW

7 months

Wondering what Binius is and why a hardware company is developing a new ZK proof system? Our co-founders, Radi and Jim, explain it all in a new Zero Knowledge Podcast episode. Thanks to @AnnaRRose @_bfarmer and @zeroknowledgefm for hosting!

Episode 303: A Dive into Binius with Ulvetanna - ZK Podcast

Zero Knowledge Podcast is a show about zk proofs and other blockchain tech. Learn about the latest in zero knowledge research, cryptography-enabled privacy tech.

zeroknowledge.fm

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Irreducible

@IrreducibleHW

2 months

ZK proving is entering a new high-performance era! Check out our latest blog post: Here we explain why applying high-performance compute to ZKP is crucial for success of the web3 ecosystem. We take a historical walk through some of the most impactful

The Need for High-Performance Zero Knowledge Proving - Irreducible

ZKP requires high-performance compute to bring cost-effective, real-time transaction validation to web3.

www.irreducible.com

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Irreducible

@IrreducibleHW

1 year

Our latest blog post is a deep dive into Ulvetanna's approach to hardware design for ZKPs, starting with the NTT module used by Polygon zkEVM!

A Throughput-Optimized FPGA Architecture for Goldilocks NTT - Irreducible

We present a modular, fully-pipelined FPGA architecture for large NTT computations in the 64-bit Goldilocks finite field

www.irreducible.com

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Irreducible

@IrreducibleHW

1 year

Read up on our new proximity gap theorem which improves Brakedown performance by 2x:

Proximity Testing with Logarithmic Randomness - Irreducible

Our new result in error-correcting codes yields a 2x zk-SNARK speedup

www.irreducible.com

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Irreducible

@IrreducibleHW

6 months

Too busy to read our paper "Succinct Arguments over Towers of Binary Fields"? Watch @benediamond break down the key ideas in this presentation to the ZK Study club!

zkStudyClub - Succinct Arguments over Towers of Binary Fields (Ben...

In this paper, the authors introduce an efficient SNARK for towers of binary fields. Adapting Brakedown (CRYPTO '23), they construct a multilinear polynomial...

www.youtube.com

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Irreducible

@IrreducibleHW

3 months

Announcing the first end-to-end, FPGA-accelerated Polygon zkEVM prover, delivering a 40% speedup over a top-of-the-line GCP instance

Accelerating Polygon zkEVM - Irreducible

We report the first end-to-end, FPGA-accelerated Polygon zkEVM prover.

www.irreducible.com

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Irreducible

@IrreducibleHW

8 months

Information is measured in bits

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Irreducible

@IrreducibleHW

8 months

Check out @SuccinctJT 's new posts on the a16zcrypto blog explaining the binary field techniques in our latest paper and their application to Lasso & JOLT!

A technical FAQ on Lasso, Jolt, and recent advancements in SNARK design

A companion FAQ for recent advances in SNARK design using Lasso+Jolt - a16z crypto

a16zcrypto.com

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Irreducible

@IrreducibleHW

1 year

@Ingo_zk You post Rust code that invokes a black box hardware accelerator. We post a detailed FPGA architecture, performance and energy efficiency measurements, and resource utilization. We are not the same.

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Irreducible

@IrreducibleHW

3 months

Many thanks to our collaborators @TomerAshur of @3miLabs , one of the original Vision authors, and Mairon Mahzoun!

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Irreducible

@IrreducibleHW

3 months

Vision Mark-32 is a specialized instance of the Vision construction from that uses the unique properties of binary tower fields to achieve high performance in hardware

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Irreducible

@IrreducibleHW

3 months

@BowlOfChilli @benediamond @gakonst @colludingnode @VitalikButerin @jimpo_potamus Indeed there is a new ZK hash function on the block! Grøstl is not out of fashion though, we're still evaluating the merits of both Vision Mark-32 and Grøstl

Irreducible

@IrreducibleHW

3 months

We're excited to present Vision Mark-32, a hash function designed for use with Binius. FPGA implementation shows that Vision Mark-32 achieves the ZK-friendliness of Poseidon with 10x better HW performance.

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Irreducible

@IrreducibleHW

8 months

@EliBenSasson @jimpo_potamus You're an inspiration to all of us, Eli!

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Irreducible

@IrreducibleHW

8 months

@BootleJonathan They use Ligero in a blackbox way, after taking an e/k penalty. We modify Ligero/Brakedown itself, in such a way that allows "native" use of 𝔽₂-witnesses (instead of transporting everything via the RMFE).

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